Low dropout linear regulators (LDOs) are a simple, effective way to regulate an output voltage powered from a higher input voltage. The most critical LDO parameters are input voltage range, output voltage, output current, dropout voltage, packaging size, power dissipation. The racks of compute engines (GPU, CPU and storage) and the accompanying network infrastructure required for these applications consume significant electrical power from the grid. In a power-constrained AI cluster or data center, every Watt of power that is used by the network is a Watt of power. A low dropout regulator (LDO) consists of a voltage reference, an error amplifier, a feedback voltage divider, and a series pass element, usually a bipolar or CMOS transistor (see Figure 1). Output current is controlled by the PMOS transistor, which in turn is controlled by the error amplifier. This system block diagram represents a simplified small-signal AC model of a typical LDO. Ideally, VIN has no impact on the loop. AEA and Gm form a high-gain path necessary for accurate regulation. AFB is the gain. The Kyocera electronic components used in an optical module are shown in the block diagram. IC Reference Search for certified products (Crystal Devices) by manufacturer name. Previous TDM LDOs require a dedicated com-pensation capacitor for each channel because, during controller switching, one node of the compensation capacitor experiences large voltage variations that hinder multiplexing the capacitor.
